Programmable logic devices (PLDs) (also sometimes referred to as complex PLDs (CPLDs), programmable array logic (PALs), programmable logic arrays (PLAs), field PLAs (FPLAs), erasable PLDs (EPLDs), electrically erasable PLDs (EEPLDs), logic cell arrays (LCAs), field programmable gate arrays (FPGAs), or by other names) are well-known integrated circuits (ICs) that provide the advantages of fixed ICs with the flexibility of custom ICs. Such devices typically provide an “off the shelf” device having at least a portion that can be programmed to meet a user's specific needs. Application specific integrated circuits (ASICs) have traditionally been fixed ICs. However, it is possible to provide an ASIC that has a portion or portions that are programmable. Thus, it is possible for an IC device to have qualities of both an ASIC and a PLD. The term PLD as used herein will be considered broad enough to include such devices.
PLDs have configuration elements that may be programmed or reprogrammed. Placing new data into the configuration elements programs or reprograms the PLD's logic functions and associated routing pathways. Configuration elements that are field programmable are often implemented as random access memory (RAM) cells, which in PLDs are sometimes referred to as “configuration RAM.” Configuration RAMs are generally implemented as a 6-transistor static RAM (6T-SRAM). Thus, configuration RAMs generally refer to SRAM.
Configuration RAMs are generally coupled to pass gates. The configuration RAMs along with the pass gates are used to configure a look up table (LUT) or to connect interconnect lines used for routing in the PLD. The pass gates are n-channel metal oxide semiconductor (NMOS) transistors.